Josephson 4 K-bit cache memory design for a prototype signal processor. II. Cell array and drivers
- 期刊名称Journal of Applied Physics
- 作者Henkels, W. H.; Geppert, L. M.; Kadlec, J.; Epperlein, P. W.; Beha, H.; Chang, W. H.; Jaeckel, H.
- 卷第58卷
- 期第6期
- 印刷ISSN0021-8979
- 文件大小1065.64KB
- 发表时间1985
- DOI10.1063/1.335961
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