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[IEEE Comput. Soc International Conference on Parallel Computing in Electrical Engineering - Dresden, Germany (7-10 Sept. 2004)] Parallel Computing in Electrical Engineering, International Conference on - Algorithm Partitioning including Optimized Data-Reuse for Processor Arrays

[IEEE Comput. Soc International Conference on Parallel Computing in Electrical Engineering - Dresden, Germany (7-10 Sept. 2004)] Parallel Computing in Electrical Engineering, International Conference on - Algorithm Partitioning including Optimized Data-Reuse for Processor Arrays

Siegel, S.; Merker, R.
  • 作者Siegel, S.; Merker, R.
  • 文件大小307.73KB
  • 发表时间2004
  • DOI10.1109/pcee.2004.10
  • 页码85-90
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