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[IEEE 2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. - San Jose, CA, USA (April 17-21, 2005)] 2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. - Effect of layout orientation on the performance and reliabiltiy of high voltage N-LDMOS in standard submicron logic STI CMOS process

[IEEE 2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. - San Jose, CA, USA (April 17-21, 2005)] 2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. - Effect of layout orientation on the performance and reliabiltiy of high voltage N-LDMOS in standard submicron logic STI CMOS process

Bin Wang, ; Hoc Nguyen, ; Mavoori, J.; Horch, A.; Yanjun Ma, ; Humes, T.; Paulsen, R.
  • 作者Bin Wang, ; Hoc Nguyen, ; Mavoori, J.; Horch, A.; Yanjun Ma, ; Humes, T.; Paulsen, R.
  • 文件大小378.70KB
  • 发表时间2005
  • DOI10.1109/RELPHY.2005.1493189
  • 页码654-655
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