[IEEE Design, Automation and Test in Europe - Munich, Germany (07-11 March 2005)] Design, Automation and Test in Europe - A Memory Hierarchical Layer Assigning and Prefetching Technique to Overcome the Memory Performance/Energy Bottleneck
Dasygenis, M.; Brockmeyer, E.; Durinck, B.; Catthoor, F.; Soudris, D.; Thanailakis, A.
- 作者Dasygenis, M.; Brockmeyer, E.; Durinck, B.; Catthoor, F.; Soudris, D.; Thanailakis, A.
- 文件大小96.23KB
- 发表时间2005
- DOI10.1109/date.2005.19
- 页码946-947