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[IEEE Design, Automation and Test in Europe - Munich, Germany (07-11 March 2005)] Design, Automation and Test in Europe - Low Power Oriented CMOS Circuit Optimization Protocol

[IEEE Design, Automation and Test in Europe - Munich, Germany (07-11 March 2005)] Design, Automation and Test in Europe - Low Power Oriented CMOS Circuit Optimization Protocol

Verle, A.; Michel, X.; Azemard, N.; Maurine, P.; Auvergne, D.

作者Verle, A.; Michel, X.; Azemard, N.; Maurine, P.; Auvergne, D.
文件大小209.73KB
发表时间2005
DOI10.1109/date.2005.202
页码640-645

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