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[IEEE 2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Arlington, VA, USA (2006.10.4-2006.10.4)] 2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Soft Error Masking Circuit and Latch Using Schmitt Trigger Circuit

[IEEE 2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Arlington, VA, USA (2006.10.4-2006.10.4)] 2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Soft Error Masking Circuit and Latch Using Schmitt Trigger Circuit

Sasaki, Yoichi; Namba, Kazuteru; Ito, Hideo

作者Sasaki, Yoichi; Namba, Kazuteru; Ito, Hideo
文件大小258.22KB
发表时间2006
DOI10.1109/dft.2006.60
页码327-335

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