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[IEEE 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) - Bangalore, India (2007.01.6-2007.01.10)] 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) - Design of Two-Stage Miller-Compensated Amplifiers Based on an Optimized Settling Model

[IEEE 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) - Bangalore, India (2007.01.6-2007.01.10)] 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) - Design of Two-Stage Miller-Compensated Amplifiers Based on an Optimized Settling Model

Aminzadeh, Hamed; Danaie, Mohammad; Lotfi, Reza
  • 作者Aminzadeh, Hamed; Danaie, Mohammad; Lotfi, Reza
  • 文件大小318.42KB
  • 发表时间2007
  • DOI10.1109/vlsid.2007.65
  • 页码171-176
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