Variability Driven Gate Sizing for Binning Yield Optimization
- 期刊名称IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- 作者Davoodi, Azadeh; Srivastava, Ankur
- 卷第16卷
- 期第6期
- 印刷ISSN1063-8210
- 文件大小513.94KB
- 发表时间2008-06
- DOI10.1109/tvlsi.2008.2000252
- 页码683-692
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