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Loop profiling tool for HPC code inspection as an efficient method of FPGA based acceleration

Loop profiling tool for HPC code inspection as an efficient method of FPGA based acceleration

Pietroń, Marcin; Russek, Paweł; Wiatr, Kazimierz
  • 期刊名称International Journal of Applied Mathematics and Computer Science
  • 作者Pietroń, Marcin; Russek, Paweł; Wiatr, Kazimierz
  • 卷第20卷
  • 期第3期
  • 印刷ISSN1641-876X
  • 文件大小244.35KB
  • 发表时间2010-01-1
  • DOI10.2478/v10006-010-0043-1
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