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[IEEE 2011 International Symposium on Electronic System Design (ISED) - Kochi, Kerala, India (2011.12.19-2011.12.21)] 2011 International Symposium on Electronic System Design - Vedic Divider: Novel Architecture (ASIC) for High Speed VLSI Applications

[IEEE 2011 International Symposium on Electronic System Design (ISED) - Kochi, Kerala, India (2011.12.19-2011.12.21)] 2011 International Symposium on Electronic System Design - Vedic Divider: Novel Architecture (ASIC) for High Speed VLSI Applications

Saha, Prabir; Banerjee, Arindam; Bhattacharyya, Partha; Dandapat, Anup

作者Saha, Prabir; Banerjee, Arindam; Bhattacharyya, Partha; Dandapat, Anup
文件大小447.40KB
发表时间2011
DOI10.1109/ISED.2011.62
页码67-71

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