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[IEEE 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) - San Jose, CA, USA (2011.11.7-2011.11.10)] 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) - Modeling the computational efficiency of 2-D and 3-D silicon processors for early-chip planning

[IEEE 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) - San Jose, CA, USA (2011.11.7-2011.11.10)] 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) - Modeling the computational efficiency of 2-D and 3-D silicon processors for early-chip planning

Grange, Matthew; Jantsch, Axel; Weerasekera, Roshan; Pamunuwa, Dinesh

作者Grange, Matthew; Jantsch, Axel; Weerasekera, Roshan; Pamunuwa, Dinesh
文件大小751.01KB
发表时间2011
DOI10.1109/iccad.2011.6105347
页码310-317

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