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SA-FEMIP: A Self-Adaptive Features Extractor and Matcher IP-Core Based on Partially Reconfigurable FPGAs for Space Applications

SA-FEMIP: A Self-Adaptive Features Extractor and Matcher IP-Core Based on Partially Reconfigurable FPGAs for Space Applications

Di Carlo, Stefano; Gambardella, Giulio; Prinetto, Paolo; Rolfo, Daniele; Trotta, Pascal
  • 期刊名称IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • 作者Di Carlo, Stefano; Gambardella, Giulio; Prinetto, Paolo; Rolfo, Daniele; Trotta, Pascal
  • 印刷ISSN1063-8210
  • 电子ISSN1557-9999
  • 文件大小3492.45KB
  • 发表时间2014
  • DOI10.1109/TVLSI.2014.2357181
  • 页码1-1
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