A 1.4 pJ/bit, Power-Scalable 16×12 Gb/s Source-Synchronous I/O With DFE Receiver in 32 nm SOI CMOS Technology

Dickson, Timothy O.; Liu, Yong; Rylov, Sergey V.; Agrawal, Ankur; Kim, Seongwon; Hsieh, Ping-Hsuan; Bulzacchelli, John F.; Ferriss, Mark; Ainspan, Herschel A.; Rylyakov, Alexander; Parker, Benjamin D.; Beakes, Michael P.; Baks, Christian; Shan, Lei; Kwark, Young; Tierno, Jose A.; Friedman, Daniel J.

期刊名称IEEE Journal of Solid-State Circuits
作者Dickson, Timothy O.; Liu, Yong; Rylov, Sergey V.; Agrawal, Ankur; Kim, Seongwon; Hsieh, Ping-Hsuan; Bulzacchelli, John F.; Ferriss, Mark; Ainspan, Herschel A.; Rylyakov, Alexander; Parker, Benjamin D.; Beakes, Michael P.; Baks, Christian; Shan, Lei; Kwark, Young; Tierno, Jose A.; Friedman, Daniel J.
卷第50卷
期第8期
印刷ISSN0018-9200
电子ISSN1558-173X
文件大小4018.52KB
发表时间2015-8
DOI10.1109/JSSC.2015.2412688
页码1917-1931

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A 1.4 pJ/bit, Power-Scalable 16×12 Gb/s Source-Synchronous I/O With DFE Receiver in 32 nm SOI CMOS Technology