[IEEE 2015 19th International Symposium on VLSI Design and Test (VDAT) - Ahmedabad, India (2015.6.26-2015.6.29)] 2015 19th International Symposium on VLSI Design and Test - A novel VLSI design of DCTQ processor for FPGA implementation
Jain, Yogesh M.; Jadhav, Aviraj R.; Dixit, Harish V.; Hindole, Akshay S.; Vadakoott, Jithin R.; Bilaye, Devendra S.
- 作者Jain, Yogesh M.; Jadhav, Aviraj R.; Dixit, Harish V.; Hindole, Akshay S.; Vadakoott, Jithin R.; Bilaye, Devendra S.
- 文件大小480.03KB
- 发表时间2015
- DOI10.1109/ISVDAT.2015.7208102
- 页码1-5