[IEEE 2017 IEEE 12th International Conference on ASIC (ASICON) - Guiyang, China (2017.10.25-2017.10.28)] 2017 IEEE 12th International Conference on ASIC (ASICON) - Auxiliary testability design schemes for CMOS DACs with ultrahigh sampling rates
Li, Bao; Zhao, Long; Cheng, Yu-Hua
- 作者Li, Bao; Zhao, Long; Cheng, Yu-Hua
- 文件大小622.70KB
- 发表时间2017
- DOI10.1109/ASICON.2017.8252405
- 页码36-39