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[IEEE 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors - Montreal, QC, Canada (2007.07.9-2007.07.11)] 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP) - Author index2007
[IEEE 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors - Montreal, QC, Canada (2007.07.9-2007.07.11)] 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP) - Reconfigurable Universal AdderCalderon, Humberto; Gaydadjiev, Georgi; Vassiliadis, Stamatis · 2007
[IEEE 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors - Montreal, QC, Canada (2007.07.9-2007.07.11)] 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP) - Table of ContentsGies, Valentin; Bernard, Thierry M.; Merigot, Alain · 2007
[IEEE 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors - Montreal, QC, Canada (2007.07.9-2007.07.11)] 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP) - Reduced Delay BCD AdderBayrakci, Alp Arslan; Akkas, Ahmet · 2007
[IEEE 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors - Montreal, QC, Canada (2007.07.9-2007.07.11)] 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP) - Power6 Decimal DivideSchwarz, Eric M.; Carlough, Steven R. · 2007
[IEEE 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors - Montreal, QC, Canada (2007.07.9-2007.07.11)] 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP) - SIMD Vectorization of Histogram FunctionsShahbahrami, Asadollah; Juurlink, Ben; Vassiliadis, Stamatis · 2007
[IEEE 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors - Montreal, QC, Canada (2007.07.9-2007.07.11)] 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP) - Parallelizing HMMER for Hardware Acceleration on FPGAsDerrien, Steven; Quinton, Patrice · 2007
[IEEE 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors - Montreal, QC, Canada (2007.07.9-2007.07.11)] 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP) - 0/1 Knapsack on Hardware: A Complete SolutionNibbelink, Kevin; Rajopadhye, Sanjay; McConnell, Ross · 2007
EGRA: A Coarse Grained Reconfigurable Architectural TemplateAnsaloni, Giovanni; Bonzini, Paolo; Pozzi, Laura · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2011
[IEEE 2008 Symposium on Application Specific Processors (SASP) - Anaheim, CA, USA (2008.06.8-2008.06.9)] 2008 Symposium on Application Specific Processors - Design and Architectural Exploration of Expression-Grained Reconfigurable ArraysAnsaloni, Giovanni; Bonzini, Paolo; Pozzi, Laura · 2008
[IEEE Design, Automation & Test in Europe Conference - Nice, France (2007.04.16-2007.04.20)] 2007 Design, Automation & Test in Europe Conference & Exhibition - Polynomial-Time Subgraph Enumeration for Automated Instruction Set ExtensionBonzini, Paolo; Pozzi, Laura · 2007
[ACM Press the 2008 international conference - Atlanta, GA, USA (2008.10.19-2008.10.24)] Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems - CASES '08 - Compiling custom instructions onto expression-grained reconfigurable architecturesBonzini, Paolo; Ansaloni, Giovanni; Pozzi, Laura · 2008