[IEEE 2019 International Conference on Communication and Electronics Systems (ICCES) - Coimbatore, India (2019.7.17-2019.7.19)] 2019 International Conference on Communication and Electronics Systems (ICCES) - Speed Optimization of the AES Algorithm Using Pipeline Hardware Architecture
- 作者Punia, Dheeraj; Singh, Brahmjit
- 文件大小6045.74KB
- 发表时间2019
- DOI10.1109/ICCES45898.2019.9002086
- 页码2070-2074
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