海量图书期刊资源,随时随地畅享阅读乐趣
[IEEE . 2003 International Symposium on System-on-Chip - Tampere, Finland (19-21 Nov. 2003)] Proceedings. 2003 International Symposium on System-on-Chip (IEEE Cat. No.03EX748) - CTL based DFT solution to accelerate design to test development for system on chip devicesTalluto, S. · 2003
[IEEE ISCAS 2003. International Symposium on Circuits and Systems - Bangkok, Thailand (25-28 May 2003)] Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03. - Interface design approach for system on chip based on configurationMaalej, I.; Gogniat, G.; Abid, M.; Philippe, J.L. · 2003
[IEEE CCGrid 2003. 3rd IEEE/ACM International Symposium on Cluster Computing and the Grid, 2003. Proceedings. - Tokyo, Japan (2003.05.15-2003.05.15)] CCGrid 2003. 3rd IEEE/ACM International Symposium on Cluster Computing and the Grid, 2003. Proceedings. - Design and implementation of PVFS-PM: a cluster file system on SCoreSegawa, K.; Tatebe, O.; Kodama, Y.; Kudoh, T.; Shimizu, T. · 2003
[IEEE Conference Record. 2003 IEEE International Symposium on Electronics and the Environment - Boston, MA, USA (19-22 May 2003)] IEEE International Symposium on Electronics and the Environment, 2003. - Research about the quantified assess system on the life cycle of typical electromechanic product based on the economic characterLiu Gang, ; Xian Dong, ; Duan Guanghong, ; Wang Jingsong, · 2003
[IEEE 2003 International Symposium on VLSI Technology, Systems and Applications. Technical Papers - Hsinchu, Taiwan (6-8 Oct. 2003)] 2003 International Symposium on VLSI Technology, Systems and Applications. Proceedings of Technical Papers. (IEEE Cat. No.03TH8672) - Framework approach for system on chip software developmentWin-Bin See, ; Pao-Ann Hsiung, ; Sao-Jie Chen, · 2003
[IEEE Comput. Soc Second IEEE and ACM International Symposium on Mixed and Augmented Reality - Tokyo, Japan (7-10 Oct. 2003)] The Second IEEE and ACM International Symposium on Mixed and Augmented Reality, 2003. Proceedings. - Implementation of an augmented reality system on a PDAPasman, W.; Woodward, C. · 2003
[IEEE Comput. Soc ISQED 2003: 4th International Symposium on Quality Electronic Design - San Jose, CA, USA (24-26 March 2003)] Fourth International Symposium on Quality Electronic Design, 2003. Proceedings. - LYS: a solution for system on chip (SoC) production cost and time to volume reductionHeliot, J.-P.; Parmentier, F.; Baron, M.-P. · 2003
[IEEE CIMSA'03. 2003 IEEE International Symposium on Computational Intelligence for Measurement Systems and Applications - Lugano, Switzerland (29-31 July 2003)] 2003 International Conference Physics and Control. Proceedings (Cat. No.03EX708) - Dish extraction method with neural network for food intake measuring system on medical useTakeda, F.; Kumada, K.; Takara, M. · 2003
A Modular and Scalable Architecture for the Realization of High-speed Programmable Rank Order Filters Using Threshold LogicHatirnaz, İ.; Gürkaynak, F. K.; Leblebici, Y. · VLSI Design · 2000
[IEEE Research in Microelectronics and Electronics, 2005 PhD - Lausanne, Switzerland (July, 25, 2005)] Research in Microelectronics and Electronics, 2005 PhD - Semi-automated design of a MOS currentmode logic standard cell library from generic componentsBadel, S.; Hatirnaz, I.; Leblebici, Y. · 2005
[IEEE 2006 IEEE International Symposium on Circuits and Systems - Island of Kos, Greece (21-24 May 2006)] 2006 IEEE International Symposium on Circuits and Systems - Via-Programmable Expanded Universal Logic Gate in MCML for Structured ASIC Applications: Circuit DesignBrauer, E.J.; Hatirnaz, I.; Badel, S.; Leblebici, Y. · 2006
[IEEE 2000 International Conference on Acoustics, Speech and Signal Processing - Istanbul, Turkey (5-9 June 2000)] 2000 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.00CH37100) - A compact modular architecture for high-speed binary sortingHatirnaz, I.; Gurkaynak, F.K.; Leblebici, Y. · 2000
[IEEE 2004 IEEE International Symposium on Circuits and Systems - Vancouver, BC, Canada (23-26 May 2004)] 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) - Modelling and implementation of twisted differential on-chip interconnects for crosstalk noise reductionHatirnaz, I.; Leblebici, Y. · 2004
[IEEE Twelfth Annual IEEE International ASIC/SOC Conference - Washington, DC, USA (15-18 Sept. 1999)] Twelfth Annual IEEE International ASIC/SOC Conference (Cat. No.99TH8454) - A modular and scalable architecture for the realization of high-speed programmable rank order filtersHatirnaz, I.; Gurkaynak, F.K.; Leblebici, Y. · 1999
[IEEE 13th Annual IEEE International ASIC/SOC Conference - Arlington, VA, USA (13-16 Sept. 2000)] Proceedings of 13th Annual IEEE International ASIC/SOC Conference (Cat. No.00TH8541) - Scalable binary sorting architecture based on rank ordering with linear area-time complexityHatirnaz, I.; Leblebici, Y. · 2000