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[IEEE 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems - Vancouver, BC (2011.10.3-2011.10.5)] 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems - [Copyright notice]2011
[IEEE 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems - Vancouver, BC (2011.10.3-2011.10.5)] 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems - Author Index2011
[IEEE 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems - Vancouver, BC (2011.10.3-2011.10.5)] 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems - [Roster page]2011
[IEEE 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - Vancouver, BC, Canada (2011.10.3-2011.10.5)] 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems - Reviewers2011
[IEEE 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - Vancouver, BC, Canada (2011.10.3-2011.10.5)] 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems - Message from the Symposium Chairs2011
[IEEE 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - Vancouver, BC, Canada (2011.10.3-2011.10.5)] 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems - Organizing Committee2011
[IEEE 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - Vancouver, BC, Canada (2011.10.3-2011.10.5)] 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems - Keynote Speakers2011
[IEEE 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - Vancouver, BC, Canada (2011.10.3-2011.10.5)] 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems - Cover Art2011
A Probabilistic Approach to Diagnose SETs in Sequential CircuitsSreenivas Gangadhar, Spyros Tragoudas · 2013
Non-enumerative Generation of Path Delay Distributions and Its Application to Critical Path SelectionSomashekar, Ahish Mysore; Tragoudas, Spyros; Jayabharathi, Rathish; Gangadhar, Sreenivas · ACM Transactions on Design Automation of Electronic Systems · 2016
[IEEE 2011 IEEE VLSI Test Symposium (VTS) - Dana Point, CA, USA (2011.05.1-2011.05.5)] 29th VLSI Test Symposium - An analytical method for estimating SET propagationGangadhar, Sreenivas; Tragoudas, Spyros · 2011
[IEEE 2008 14th IEEE International On-Line Testing Symposium (IOLTS) - Rhodes, Greece (2008.07.7-2008.07.9)] 2008 14th IEEE International On-Line Testing Symposium - Propagation of Transients Along Sensitizable PathsGangadhar, Sreenivas; Skoufis, Michael; Tragoudas, Spyros · 2008
[IEEE 2010 11th International Symposium on Quality of Electronic Design (ISQED) - San Jose, CA, USA (2010.03.22-2010.03.24)] 2010 11th International Symposium on Quality Electronic Design (ISQED) - A novel probabilistic SET propagation methodGangadhar, Sreenivas; Tragoudas, Spyros · 2010
[IEEE 2012 IEEE 30th International Conference on Computer Design (ICCD 2012) - Montreal, QC, Canada (2012.09.30-2012.10.3)] 2012 IEEE 30th International Conference on Computer Design (ICCD) - Non-enumerative generation of statistical path delays for ATPGSomashekar, Ahish Mysore; Tragoudas, Spyros; Gangadhar, Sreenivas; Jayabharathi, Rathish · 2012
[IEEE 2010 IEEE 16th International On-Line Testing Symposium (IOLTS 2010) - Corfu, Greece (2010.07.5-2010.07.7)] 2010 IEEE 16th International On-Line Testing Symposium - Probabilistic methods for the impact of an SET in combinational logicGangadhar, Sreenivas; Tragoudas, Spyros · 2010