[IEEE Design, Automation and Test in Europe - Munich, Germany (07-11 March 2005)] Design, Automation and Test in Europe - Low Power Oriented CMOS Circuit Optimization ProtocolVerle, A.; Michel, X.; Azemard, N.; Maurine, P.; Auvergne, D. · 2005

[IEEE 2004 IEEE International Symposium on Circuits and Systems - Vancouver, BC, Canada (23-26 May 2004)] 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) - Delay bound based CMOS gate sizing techniqueVerle, A.; Michel, X.; Maurine, P.; Azemard, N.; Auvergne, D. · 2004