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Switched-Capacitor Techniques For High-Accuracy Filter And ADC Design ||Quinn, Patrick J.; Roermund, Arthur H. M. Van · 2007
A 28-nm CMOS 1 V 3.5 GS/s 6-bit DAC With Signal-Independent Delta-I Noise DfT SchemeRadulov, Georgi I.; Quinn, Patrick J.; van Roermund, Arthur H. M. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2015
A 28-nm CMOS 7-GS/s 6-bit DAC With DfT Clock and Memory Reaching SFDR <formula><tex>(textbf {>}textbf{50})</tex></formula> dB Up to 1 GHzRadulov, Georgi I.; Quinn, Patrick J.; van Roermund, Arthur H. M. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2014