SkyQuery: Federating Astronomy Archives
- 期刊名称Computing in Science & Engineering
- 作者Budavari, Tamas; Dobos, Laszlo; Szalay, Alexander S.
- 卷第15卷
- 期第3期
- 印刷ISSN1521-9615
- 文件大小4461.79KB
- 发表时间2013-05
- DOI10.1109/mcse.2013.41
- 页码12-20
A 1 GS/s, 31Balagopal, Sakkarapani; Zhu, Kehan; Saxena, Vishal · Analog Integrated Circuits and Signal Processing · 2014
A CMOS Spiking Neuron for Brain-Inspired Neural Networks with Resistive Synapses and In-Situ LearningWu, Xinyu; Saxena, Vishal; Zhu, Kehan; Balagopal, Sakkarapani · IEEE Transactions on Circuits and Systems II: Express Briefs · 2015
Design-to-testing: a low-power, 1.25 GHz, single-bit single-loop continuous-time $$Delta Sigma$$ Δ Σ modulator with 15 MHz bandwidth and 60 dB dynamic rangeBalagopal, Sakkarapani; Zhu, Kehan; Wu, Xinyu; Saxena, Vishal · Analog Integrated Circuits and Signal Processing · 2016
[IEEE 2015 IEEE Workshop on Microelectronics and Electron Devices (WMED) - Boise, ID, USA (2015.3.20-2015.3.20)] 2015 IEEE Workshop on Microelectronics and Electron Devices (WMED) - Design Analysis of a 12.5 GHz PLL in 130 Nm SiGe BiCMOS ProcessZhu, Kehan; Saxena, Vishal; Wu, Xinyu; Balagopal, Sakkarapani · 2015
[IEEE 2017 IEEE International Symposium on Circuits and Systems (ISCAS) - Baltimore, MD, USA (2017.5.28-2017.5.31)] 2017 IEEE International Symposium on Circuits and Systems (ISCAS) - Realization of a 10 GHz PLL in IBM 130 nm SiGe BiCMOS process for optical transmitterZhu, Kehan; Balagopal, Sakkarapani; Wu, Xinyu; Saxena, Vishal · 2017
[IEEE 2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS) - Columbus, OH, USA (2013.08.4-2013.08.7)] 2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS) - Design of a 10-Gb/s integrated limiting receiver for silicon photonics interconnectsZhu, Kehan; Balagopal, Sakkarapani; Saxena, Vishal; Kuang, Wan · 2013