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[IEEE 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - Hyderabad, India (2006.01.3-2006.01.7)] 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - 19th International Conference on VLSI Design - Cover2006
[IEEE 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - Hyderabad, India (2006.01.3-2006.01.7)] 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - 19th International Conference on VLSI Design - Copyright Page2006
[IEEE 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - Hyderabad, India (2006.01.3-2006.01.7)] 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - 19th International Conference on VLSI Design - Table of Contents2006
[IEEE 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - Hyderabad, India (2006.01.3-2006.01.7)] 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - Call for Participation: 10th IEEE VLSI Design & Test Symposium2006
[IEEE 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - Hyderabad, India (2006.01.3-2006.01.7)] 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - VLSI Design Conference History2006
[IEEE 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - Hyderabad, India (2006.01.3-2006.01.7)] 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - VLSI Design 2006 Conference Awards2006
[IEEE 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - Hyderabad, India (2006.01.3-2006.01.7)] 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - VLSI Design 2005 Conference Awards2006
[IEEE Proceedings. 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems and Design - Hyderabad, India (2006.01.3-2006.01.7)] 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - Proceedings. 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems and Design2006
Yield-Driven, False-Path-Aware Clock Skew SchedulingJeng-Liang Tsai, ; Dong Hyun Baik, ; Chen, C.C.; Saluja, K.K. · IEEE Design and Test of Computers · 2005
[IEEE IEEE International Conference on Test, 2005. - Charlotte, NC, USA (Nov. 8, 2005)] IEEE International Conference on Test, 2005. - Progressive random access scan: a simultaneous solution to test power, test data volume and test timeDong Hyun Baik, ; Saluja, K.K. · 2005
[IEEE 14th Asian Test Symposium (ATS'05) - Calcutta, India (2005.12.21-2005.12.21)] 14th Asian Test Symposium (ATS'05) - State-reuse Test Generation for Progressive Random Access Scan: Solution to Test Power, Application Time and Data SizeDong Hyun Baik, ; Saluja, K.K. · 2005
[IEEE Comput. Soc 16th International Conference on VLSI Design. Concurrently with the 2nd International Conference on Embedded Systems Design - New Delhi, India (4-8 Jan. 2003)] 16th International Conference on VLSI Design, 2003. Proceedings. - Exclusive test and its applications to fault diagnosisAgrawal, V.D.; Dong Hyun Baik, ; Yong Chang Kim, ; Saluja, K.K. · 2003
[IEEE Computer Soc 18th International Conference on VLSI Design - Kolkata, India (3-7 Jan. 2005)] 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design - False path and clock scheduling based yield-aware gate sizingJeng-Liang Tsai, ; Dong Hyun Baik, ; Chung-Ping Chen, C.; Saluja, K.K. · 2005